Phase locked loop systems are well known in the prior art. These loops are typically used to maintain stable frequency, phase and other circuit parameters. Phase locked loops must have stable and controlled operating characteristics, immune to voltage, temperature and circuit fabrication variations. This is especially so during the operation of the phase locked loop when environmental conditions can change readily.
One type of prior art integrated phase locked loop typically uses a secondary loop to control the loop parameters which are also immune to temperature, process, and other operating environment variations. This type of prior art dual loop phase locked loop is described in U.S. Pat. No. 4,829,258, issued on May 9, 1989, and entitled STABILIZED PHASE LOCKED LOOP. FIG. 1 illustrates in block diagram form the structure of the prior art dual loop phase locked loop.
As can be seen from FIG. 1, reference loop 11 of the prior art dual loop phase locked loop 10 provides analog trim signals V.sub.FB1 and I.sub.OS1 to charge pump 21, loop filter 22, transconductance amplifier 23, and fixed gain current source 24 of primary loop 12 of phase locked loop 10. The analog trim signals V.sub.FB1 and I.sub.OS1 are used to compensate for various parameter variations in primary loop 12. This allows the prior art dual loop phase locked loop to be immune to process and operating environment variations. Furthermore, the loop can be programmed to different data rates by adjusting the reference clock signal.
Disadvantage are, however, associated with the prior art dual loop phase locked loop. One disadvantage is that the loop gain and bandwidth of the prior art dual loop phase locked loop cannot be adjusted to satisfy different performance requirements after the prior art phase locked loop is fabricated. Typically, a floppy disk drive that employs a phase locked loop to detect and lock onto incoming data stream has a large amount of jitter. However, the floppy disk drive typically has a very little instantaneous speed variation. A tape drive that may also employ a phase locked loop to detect and lock onto incoming data stream has a large instantaneous speed variation, but a very little jitter. As is known, jitter tolerance and instantaneous speed variation tolerance are opposing requirements for a single phase locked loop design. In order for a phase locked loop to have a good jitter tolerance, narrower bandwidth and lower loop gain are needed. On the other hand, broader bandwidth and higher loop gain are required for the phase locked loop be to more nimble to respond to the instantaneous speed variation. Therefore, a phase locked loop that has fine tuned bandwidth and loop gain for a floppy disk drive cannot be fine tuned for a tape drive. Likewise, a phase locked loop that has fine tuned bandwidth and loop gain for tape drive cannot be fine tuned for a floppy disk drive.